陳聿廣教授 (Dr. Andy, Yu-Guang Chen)
Dr. Yu-Guang Chen received the B.S. degree and Ph.D. degree in computer science from the National Tsing Hua University, Hsinchu, Taiwan, in 2009 and 2016, respectively. He was a Visiting Scholar at Kyoto University, Kyoto, Japan, in 2014 summer; a Lecturer in Department of Electrical and Computer Engineering, Missouri University of Science and Technology, MO, USA, in 2015; and a Research Fellow in Department of Computer Science & Engineering, University of Notre Dame, IN, USA, in 2016. He is currently an Assistant Professor in Dept. of Computer Science and Engineering, Yuan Ze University. He has served as a reviewer in top journals such as IEEE TCAD and IEEE TVLSI, and a TPC member in top conferences such as China Semiconductor Technology International Conference (CSTIC).
His current research interests include low power designs and reliability issues in computer-aided design, circuit reliability (especially negative bias temperature instability effect), power gating and wake-up scheduling, retention issues, 3-D-IC reliability, ultra-low voltage designs, dynamic voltage/frequency scaling, and machine learning in EDA. He has continuously published valuable journal articles and conference papers in top-notch journals and conferences such as TCAD, DAC, ICCAD, DATE, and ASPDAC. The quality of his research can be demonstrated by one best paper nomination (ISPD 2015, 3 out of 44), the 2014 NOVATEK Fellowship (6 out of 30,549), the 2016 Taiwan Semiconductor Industry Association Award for Doctoral Graduate Students (8 out of around 30,000), and Most Popular Poster Award at ASPDAC’16 SIGDA Student Research Forum (1 out of 24).
For more details, please refer to his CV (here)